The 74LS279 consists of four individual and independent Set-Reset Latches with active low inputs.
Two of the four latches have an additional S input ANDed with the primary S input. A LOW on any S input while the R input is HIGH will be stored in the latch and appear on the corresponding Q output as a HIGH. A LOW on the R input while the S input is HIGH will clear the Q output to a LOW. Simultaneous transition of the R and S inputs from LOW-to HIGH will cause the Q output to be indeterminate. Both inputs are voltage level triggered and are not affected by transition time of the input data.
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The 74LS279 consists of four individual and independent Set-Reset Latches with active low inputs.
Two of the four latches have an additional S input ANDed with the primary S input. A LOW on any S input while the R input is HIGH will be stored in the latch and appear on the corresponding Q output as a HIGH. A LOW on the R input while the S input is HIGH will clear the Q output to a LOW. Simultaneous transition of the R and S inputs from LOW-to HIGH will cause the Q output to be indeterminate. Both inputs are voltage level triggered and are not affected by transition time of the input data.